The core of load and circulation management of high-frequency online UPS parallel operation is to make the output of multiple UPS completely consistent and the load evenly distributed through high-precision synchronous control, accurate current sharing algorithm, high-speed communication and hardware suppression, and to suppress circulation from the root.
First, the root causes of circulation
Circulating current is a harmful current between UPS that does not flow through the load, but only circulates between modules, which directly leads to efficiency decline, fever, overload and even system collapse.
Inconsistent voltage amplitude/phase/frequency (most important)
Output impedance and line impedance are unbalanced.
Control delay, sampling error and device parameter dispersion
Second, the core realization path of parallel load and circulation management
1. Accurate synchronization of output parameters (premise of restraining circulation)
All UPS must have the same frequency, same phase, same amplitude and same waveform, and the deviation should be controlled in a very small range.
Frequency synchronization: track the unified reference (mains supply/internal crystal oscillator) with a deviation of ≤±0.01Hz.
Phase synchronization: PLL phase locked loop+high-speed communication, phase difference ≤ 1 (3 phase difference can cause 10% rated circulation).
Voltage amplitude synchronization: DSP closed-loop control, amplitude deviation ≤ 0.2% ~ 0.5%.
Synchronous mode
Master-slave synchronization: specify the master, and the slave tracks the master; Simple and reliable, suitable for 2~3 sets.
Master-slave (distributed) synchronization: Multi-computers interact in real time through CAN/optical fiber, and dynamically negotiate benchmarks; No single point of failure, supporting multiple parallel machines.
2. Load sharing control (current sharing algorithm)
Objective: All UPS share the load evenly according to the capacity ratio, with a deviation of ≤ 5%.
Active/reactive power separation control
Active power sharing: fine-tune the output frequency to achieve P=UIcosφ balance.
Reactive power sharing: fine-tune the output voltage amplitude to realize Q=UIsinφ balance.
Mainstream current sharing algorithm
Average current method: collect the current of each machine, calculate the average value and issue instructions; High average flow precision
Sag control (virtual impedance): the analog output impedance decreases with the increase of load, and the current is naturally equalized; Can work without communication
Democratic current sharing (maximum current automatic master-slave): the module with the largest current automatically becomes the benchmark, and the rest are tracked; No preset host is required.
3. High-speed parallel communication (nerve of cooperative control)
High-speed, anti-interference links such as CAN bus, RS485 and optical fiber are adopted.
Real-time interaction: voltage, current, frequency, phase, status and fault information.
Response speed: microsecond sampling and millisecond adjustment to ensure dynamic synchronization.
4. Circulation detection and active suppression (closed-loop control)
Circulation detection: through current sampling and vector operation, the circulation components between modules are directly extracted.
Active compensation: DSP calculates the circulating current compensation in real time, corrects the PWM driving signal and cancels the circulating current.
Hardware suppression
Output series coupling inductance: low resistance to the same phase current, high resistance to the circulating current, passive suppression.
The parameters of the output LC filter are strictly matched to reduce the impedance difference.
5. Fault redundancy and dynamic reconfiguration (system reliability)
The fault machine blocks the output in milliseconds and automatically exits, which does not affect the load power supply.
The remaining UPS can quickly re-synchronize and redistribute the load to keep the total output stable.
Support N+1 redundancy, and power supply will not be interrupted when a single fault occurs.
Three, typical parallel system architecture (high frequency online UPS)
A plurality of UPS with the same model and capacity are connected in parallel to the public bus.
Each built-in DSP controller independently samples voltage/current.
High-speed parallel bus realizes data interaction and synchronization
Unified implementation of synchronization+current sharing+circulation suppression algorithm
The output is loaded after coupling inductor/filter.
Four, key indicators (industry standards)
Phase difference: ≤ 1
Voltage deviation: ≤ 0.2%
Load sharing deviation: ≤ 5%
Circulating current: ≤ 2%~5% of rated current
Switching time: ≤10ms (fault isolation/load transfer)
